Lucky Code

A deep dive into how a seemingly cosmetic C code style change — using *lwr++ = x instead of *lwr = x; lwr++ — causes Clang to generate branchless csel instructions on ARM (and cmov on x86), resulting in a 6x speedup for a custom Quicksort implementation. The post shows the full branchless Quicksort with sorting networks, compares the generated assembly with and without branches, and notes that GCC does not exhibit this behavior, consistently generating the slower branch-based version.

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